EGRE 303 SEMICONDUCTOR ELECTRONIC DEVICES – SPRING 2022
A COMPREHENSIVE PN JUNCTION COMPUTER AIDED (CAD) PROJECT
Due Date: Midnight April 14th, 2022
This project is designed for students for the following:
1. Progressively develop a Computer Aided Design Software Tool from intrinsic to pn junction
cu
ent voltage characteristics.
2. Learn by doing about the concept build up to IV Characteristics of semiconductor pn
junction.
You can work on this project individually or in teams of your choosing (teams must not exceed 4
students), but reports must be individual. For each part you are required to deliver the following:
1. For each part describe very
iefly which equations you are using by defining the
equation and if needed, one to two lines describing it.
2. Show your script for each part.
3. Show plots of the calculated data where applicable.
Introduction: In this project, you develop a CAD tool that simulates the operation of a PN junction
diode. In this project your program (Software Tool) will ask user about the material properties, the
doping and applied voltage, and the CAD tool computes the internal and terminal cu
ent
characteristics of the device. The code will have six basic parts, but each part builds on the previous
ones. So, it is in a sense, one complete simulation code.
Part 1. Intrinsic Ca
ier Concentration: Write a short code that asks the user for the temperature,
andgap, and hole and electron effective masses of a semiconductor. Have the program then
calculate the intrinsic ca
ier concentration for the material at the specified temperature.
Part 2. Built in Potential of PN Junction and Depletion Region width: Starting with Part 1
above, write a short code that asks the user for the Donor concentration on the N-side and the
Acceptor concentration on the P-side of a PN junction, as well as the permittivity (epsilon) of the
material. Remember permittivity is Ks x ε0. Have the program then calculate Built-In Potential for
this PN junction diode. Also, have the program then calculate xn, -xp and the total depletion region
width. Perform the calculation for zero applied voltage (Equili
ium).
Part 3. Graphing the Internal Electric Field, Potential and Charge Concentration: Starting with
Part 2 above, write a short code asks if the user wants to graph the internal electric field,
electrostatic potential and/or the charge concentration. Then write the code to graph these
quantities as a function of position inside the diode. Plot the quantities according to what the user
has requested. In other words, plot one, two or all three of these internal PN junction quantities.
Your plots should look similar to the depletion approximation solutions we discussed in the class
and also in the book.
Part 4: Effect of Applied Voltage: Repeat Parts 1 and 2, but this time, ask the user to specify the
applied voltage. After specifying the voltage, have the code perform the analogous calculations as
were performed in Parts 2 and 3, but this time with an applied bias. (*Note, for forward bias,
allowed VA must be less than the built-in potential.)
Part 5: Diode Ca
ier Concentration and Cu
ent: Ask the user to specify the applied voltage. For
forward bias, the applied voltage must be less than the built-in potential. Assume that the
ecombination lengths for electrons and holes are both Ln = Lp = 10um. Also, assume the mobility of
electrons and holes are 1000 cm2/V.sec and 500 cm2/V.sec, respectively. Calculate and graph the
minority ca
ier concentrations as a function of position in the diode (n(x) on the P-side and p(x) on
the N-side). Next, calculate and graph the electron and hole cu
ent densities as a function of
position everywhere inside the device (Jn(x) and Jp(x)). Finally, assuming that the cross-sectional
area of the device is 100um x 100um, calculate the terminal cu
ent of the diode in part 6.
Part 6: Diode Cu
ent versus Voltage: Ask the user to specify a voltage range for calculating the
diode cu
ent. Use the results from Part 5 to graph the cu
ent versus voltage for the range
specified by the user. For forward bias, the applied voltage must be less than the built-in potential.
Assume the diode is working at room temperature (27C=300K).