NHE2484: Communication Systems FM demodulation Components provided CD 4046 CMOS Phase-Lock Loop (PLL) integrated circuit Preliminary work Determine the PLL component parameters for a centre frequency of 470 kHz by carefully examining the data sheet. Select component values for the loop filter bearing in mind it will be used to demodulate audio. Introduction FM is produced by varying the voltage (the modulating signal) to a Voltage Controlled Oscillator (VCO). So, the frequency of the oscillator varies according to the signal driving it. A similar thing happens when demodulating FM. A VCO is locked to the incoming FM signal by the PLL. The control voltage applied to the VCO is the recovered modulation if the loop is locked. In this laboratory exercise you will build an FM demodulator and investigate the performance of the PLL as you alter loop components. Be sure to record your observations as you proceed. Procedure Build the PLL circuit. Verify the centre frequency as being close to 470 kHz. Measure the lock-in and capture range of the loop. Check operation as an FM demodulator. Determine the effects of changing loop components. Check operation if wide-band FM is applied. Discussion Did the loop demodulate NBFM? Could it be used to demodulate WBFM without any alteration? What happened to the lock-in and capture range when the loop components were altered? How would you modify the PLL in order to demodulate WBFM? What effects would a large bandwidth loop filter have on the noise properties of the PLL? How would you measure this? MJNS
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