Compare the operation of the D latch with a negative-edge-triggered D flip-flop by applying the...

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Compare the operation of the D latch with a negative-edge-triggered D flip-flop by applying the waveforms of Figure 5-80 to each and determining the Q waveforms.    Answer

David · Accepted Answer

The D latch is used to capture, or 'latch' the logic level which is present on the Data line when the clock input is 
high. If the data on the D line changes state while the clock pulse is high, then the output, Q, follows the input, D. 
When the CLK input falls to logic 0,

Compare the operation of the D latch with a negative-edge-triggered D flip-flop by applying the waveforms of Figure 5-80 to each and determining the Q waveforms. Answer

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