2023.Spring.PreLab4 (1)
CS 4141: Digital Systems Lab
Experiment #4 – Familiarization with Sequential Logic
Circuits (Flip-Flops)
CS 4141 Laboratory 4, PRE-LAB 1
Objective: The purpose of Experiment #4 is to familiarize students with the functionality of the
D and J-K flip-flops, and with the construction of a clocked flip-flop (essentially a clocked D-type
FF). We will build the RS and clocked D flip-flop circuits in the lab.
.
Turn-In Checklist
Make certain that your name, your lab section, the date, and “Pre-Lab 1” is at the top of your
paper.
• Problem 1. DFF Flip Flop Truth Table (5 points)
• Problem 2. JK Flip Flop Truth Table (5 points)
• Problem 3. Logic Diagram of a tiny ALU with DFF Accumulator (10 points)
Problem 1. DFF Flip-Flop Truth Table (5 points)
Below are the DFF logic symbol and circuit diagram (from ic_diagrams.pdf).
Learn about D Flip-Flop IC 7474. Draw truth table for the output Q and Q’. Consider all inputs
including Clock, CLEAR (Reset), PRESET and data pin D.
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Chandrahas Nanduri
CS 4141: Digital Systems Lab
Problem 2. JK Flip-Flop Truth Table (5 points)
Below are the logic symbol and IC diagram of the JK-FF.
Learn about JK Flip-Flop IC XXXXXXXXXXDraw truth table for the output Q and Q’. Consider all inputs
including Clock, Clear, data pin J, and data pin K
Problem 3. Logic Diagram of a tiny ALU with DFF Accumulator (10 points)
This problem involves building a tiny ALU performing 4-bit addition and using two 74SL74 (4
DFF’s) and a 4-bit adder.
Provide an implementation to perform the following ALU addition operation.
Add A,B – This operation adds register A and input B and stores the result in register A.
Create a 4-bit register using 4 D FFs which acts as an accumulator. This accumulator is
connected with an adder and is performing the following task.
The initial value of the accumulator is 0 and every time a clock pulse is given, it adds the cu
ent
value of the accumulator (let’s call it A) and a given 4-bit input B. The B input is provided using
4 input switches. Thus, the accumulator stores the addition of multiple 4-bit values provided to
the ALU.
Draw the Logic Diagram of a tiny ALU with DFF Accumulator. Use logical symbols, not IC
chips.
CD stands for Clear, CP stands for Clock. Pin 2 is Q1’
Pin 3 is Q1.
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Experiment #4 – Familiarization with Sequential Logic Circuits (Flip-Flops)
CS 4141 Laboratory 4, PRE-LAB 1
Turn-In Checklist
Problem 1. DFF Flip-Flop Truth Table (5 points)
Problem 2. JK Flip-Flop Truth Table (5 points)
Problem 3. Logic Diagram of a tiny ALU with DFF Accumulator (10 points)