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0 Notes: 1. For the written questions show all of your work and submit either a PDF or text file. 2. When drawing circuits in a text file you do not have to draw the shapes of the gates. Instead,...

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0
Notes:
1. For the written questions show all of your work and submit either a PDF or text file.
2. When drawing circuits in a text file you do not have to draw the shapes of the gates.
Instead, simply use the word NAND, NOR, AND, OR, or NOT.
e.g.
A----NAND---C
B----/
stands for C = A NAND B
3. For programming questions hand in your source program (.asm file).
4. Name you programs LastnameFirstnameAxQy.asm, replace x with the assignment
number and y with the question number.
5. Please comment appropriately for programming question. Please read the
“programming standards” for COMP . Marks are allocated for good
documentation.
6. Hand in your assignment through the ulearn

Written Part
Question 1 [4 marks]
Design a circuit that adds together 8X and 4X to give 12X, where X is X2X1X0, and gives a 7-‐
it sum S6S5S4S3S2S1S0. This can be done using 2 half adders and 1 full adder, no additional
gates are required.

Question 2 [8 marks]
X
Y
Z
OUT
0
0
0
1
0
0
1
0
0
1
0
1
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
0
1
1
1
0
(a) [4 marks] Using only a 4-to-1 multiplexor and one inverter (NOT gate) design a
circuit that implements the truth table given above. Do not draw the individual gates
of the multiplexor, use the logic symbol from the course notes.
Hint: Use X and Y as the select lines. OUT can be represented as a function of Z or
as 0 or as 1 for each pair of values of X and Y.
(b) [4 marks] Using only a 3-to-8 decoder and an OR gate with any many inputs as
necessary design, a circuit that implements the truth table given above. Do not draw
the individual gates of the decoder, use the logic symbol from the course notes.
Hint: Use X, Y and Z as the select lines.

Question 3 [8 marks]
Give the truth table for the following circuit. Write a sum of products expression
for Z in terms of X and Y.
(A) Write out a truth table for S, R and Q where S and R are functions of X, Y, and Z and Q is
a function of S and R. The headings for the columns in the truth table should be X, Y, Z, S, R
and Q. X, Y and Z are inputs, and S, R and Q are outputs.
(B) Write the expressions for S and R in terms of X, Y and Z. You can do this either from the
truth table or the circuit diagram. In either case write the simplest sum-of-products
expressions possible.
(C) State the value of Q for each combination of X, Y, Z. In each case give the value of Q after
there are no more changes due to gate delays.
I. Set X = 0, Y = 0, Z = 0. After all the changes due to gates delays what is Q?
II. Change Z to 1. After all the changes due to gate delays what is the value of Q?
III. Change Y to 1. After all the changes due to gate delays what is the value of Q?
IV. Change X to 1. After all the changes due to gate delays what is the value of Q?
V. Change Z to 0. After all the changes due to gate delays what is the value of Q?
VI. Change Y to 0. After all the changes due to gate delays what is the value of Q?
VII. Change Z to 1. After all the changes due to gate delays what is the value of Q?
VIII. Change X to 0. After all the changes due to gate delays what is the value of Q?


Question 4 [20 marks]
Write a su
outine that performs a linear search on an unsorted a
ay of 16-bit 2's
compliment integers.
• The su
outine has three parameters,
o The address of the a
ay
o 'N' which is the number of elements in the a
ay
o A target value to search for in the a
ay.
• The parameters must be on the stack.
• If the target value is found in the a
ay return the position at which it is found,
otherwise return -1.
• The first element is at position 0 and the last element is at position n-1.
• The result must be returned to the caller via the stack.
• Use R5 as the frame pointer and R6 as the stack pointer.
• Save and restore all registers used in the su
outine using the stack.
• Include a register dictionary and a map of the activation record for the su
outine.
• The mainline must include the following declarations:
ASCII .fill x30
FOUNDMSG .stringz "\nFound at position: "
NOTFOUNDMSG .stringz "\nNot found."
EOPMSG .stringz "\nEnd of Processing"
N .fill 10
SOURCE .fill 99
.fill -33
.fill 57
.fill 0
.fill 29
.fill -123
.fill 17
.fill 79
.fill -1
.fill 22
NUNMTARGETS .fill 4
TARGETS .fill 99
.fill -123
.fill 22
.fill 88
• You may add any other declarations you require.
• As in the su
outine R6 must be used as the stack pointer.
• The a
ay TARGETS contains target values to be searched for in the a
ay SOURCE.
• 'N' is the number of elements in the a
ay SOURCE

• NUMTARGETS is the number of elements in the a
ay TARGETS.
For each element in the a
ay TARGETS call the linear search su
outine to determine if the
element / target is found in the SOURCE a
ay and display the appropriate message as
shown in the sample output given below.
• Before calling the su
outine push the arguments onto the stack in the following
order:
o Address of the a
ay SOURCE
o The value of N
o The cu
ent target value.
• Reserve space on the stack for the value returned by the su
outine.
The target -123 is found at position 5 within the SOURCE a
ay so 5 is displayed as the
position, but the target 88 is not found in the SOURCE a
ay so "Not found." is displayed.
Using the declarations given above the output must be:
Found at position: 0
Found at position: 5
Found at position: 9
Not found.
Answered Same Day Jul 30, 2021

Solution

Gaurav answered on Aug 01 2021
133 Votes
Answers/Q1.jpg
Answers/Q2.txt

C2 C1 C0
X2 X1 X0 0 0 0 -> 8X ->
3
+ X2 X1 X0 0 0 -> 4X ->
2
====================
S6 S5 S4 S3 S2 S1 S0

S0 = 0
S1 = 0
S2 = X0
S3 = X0 + X1 - HALF ADDER 1
S4 = X1 + X2 + C0 FULL ADDER 1
S5 = X2 + C1 - HALF ADDER 2
S6 = C1

0 ------------ S0
0 ------------ S1
X0 ------------ S2

HALF ADDER - 1
|-----------------------|
| X0 -----XOR---- S3 |
| X1 ------/ |
| X0 ------\ |
| X1 -----AND---- C0 |
|-----------------------|
FULL ADDER - 1
|-----------------------|
| C0 -------\ |
| X1 --XOR--XOR-- S4 |
| X2 --/ |
| |
| X2 --AND-------OR- c1 |
| C0 --/ | |
| | |
| C0 --AND--\ | |
| X1 --/ \ | |
| OR--| |
| X1 --\ / |
| X2 --AND--/ |
|-----------------------|
HALF ADDER - 2
|-----------------------|
| X2 -----XOR---- S5 |
| C1 ------/ |
| C1 ------\ |
| X2 -----AND---- C2 |
|-----------------------|
C2 ------------ S6
Answers/Q3.docx
Q3
    
B)    S = XY + X’Y’
    R = XY’ + X’Z + YZ’
A)
        Inputs
        Outputs
        X
        Y
        Z
        X’
        Y’
        Z’
        S
        R
        Q
        0
        0
        0
        1
        1
        1
        1
        0
        0
        0
        0
        1
        1
        1
        0
        1
        1
        X (previous...
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